Contents
Boards with Hardware Power Control
- A PHY Boards with PHY Revision 5 or greater
- G PHY Boards with PHY Revision 6 or greater
Default Value of Hardware Power Control TX Power Recalculation Register
PHY Type |
Radio Revision |
Default Value |
A PHY |
Any |
0x17 |
G PHY |
8 |
0x24 |
G PHY |
Not 8 |
0x10 |
Hardware Power Control Init
A PHY Hardware Power Control Init
This was divided up in numbered functions, they may refer to PHY Revisions, but are run for all revisions of hardware. I've put them together here, but noted where the divisions were (in case it's later shown to be important)
Mask InternalLookupTable 0x3000 offset 1 with mask 0xFF7F (One)
Set TSSI Power Internal Lookup Table with the current channel
Loop 64 times (Three)
Bitwise AND the value from the TX Gain Digital Analog Converter table with 0xF, then left shift by 7
Bitwise AND the value from the TX Gain Radio Frequency Power Amplifier table with 0x7, then left shift by 4
Bitwise AND the value from the TX Gain Base Band table with 0xF
Bitwise OR these three values together and write the result to InternalLookupTable 0x5800 offset by the Loop Position
Loop over Table 4 (Four)
- Loop 2 times
- Left shift the loop position by 7 and bitwise OR it with the value from Table 4
Write the result to InternalLookupTable 0x5C00 offset with the outer Loop position * 2 + the inner Loop position
- Loop 2 times
Write the last value written to table 0x5C00 to the next two table entries in InternalLookupTable 0x5C00
Loop 12 times (Five)
- Loop 6 times
Find the DC Bias for the values corresponding to the loop positions
Write the result to InternalLookupTable 0x6000, offset 2 * outer loop position + inner loop position
- Loop 6 times
Write 0 to PHYRegister 0x75 (Six)
Read RadioRegister 0x17 and Bitwise OR the value bitwise AND'd by 0x7 and the value bitwise OR'd by 0x18 (Seven)
Read RadioRegister 0x19 and Bitwise OR the value bitwise AND'd by 0x60
- Bitwise OR the two results together and shift it left by 1
Set bit 0 in the result if bit 0x10 is set in RadioRegister 0x17
Write the result to PHYRegister 0x76
If the PHY Revision is 6 or greater (Nine)
Write 0x900 to PHYRegister 0x78
- Otherwise, if the PHY Revision is 5
Write 0xB00 to PHYRegister 0x78
- Otherwise
Write 0x200 to PHYRegister 0x78
Table 4
Element |
Value |
0 |
0x20 |
1 |
0x24 |
2 |
0x28 |
3 |
0x2D |
4 |
0x33 |
5 |
0x39 |
6 |
0x40 |
G PHY Hardware Power Control Init
MaskSet PHYRegister 0x36 with mask 0xFFC0 and set with the difference between the Idle TSSI Target (TSSI to DBM Table) and the saved Power Control Register value
MaskSet PHYRegister 0x478 with mask 0xFF00 and set with the difference between the Idle TSSI Target (TSSI to DBM Table) and the saved Power Control Register value
Bitwise AND PHYRegister 0x60 with 0xFFBF
Write 0 to PHYRegister 0x14
Bitwise OR PHYRegister 0x478 with 0x800
Bitwise AND PHYRegister 0x478 with 0xFEFF
Bitwise AND PHYRegister 0x801 with 0xFFBF