We refer to two sets of GPIO registers, the ones in the Backplane Core and the ones in the 802.11 Core. Their values are the same, but they have somewhat different meanings. If a GPIO pin is enabled in the 802.11 core, this means that the 802.11 GPIO Pin On/Off register has an effect, but only if the GPIO pin is enabled in the Backplane core.

Initialization

First, turn off bits 0xC000 in the StatusBitField.

Secondly, we setup the 802.11 GPIO registers: Enable and turn off the LEDs, by setting/unsetting appropriate bits in the GPIO control registers. The LEDs correspond to the lower 4 bits of those two registers.

Next, we need to setup the GPIO registers in the Backplane Core.

1. Start with a GPIO Mask value of 0x1F and GPIO Set value of 0xF (Note that 0xF corresponds with the LEDs GPIO pins).

2. If this Chip is a 0x4301
   1. Bitwise OR both the GPIO Mask and Set values with 0x60
3. If unk284 (Never set in the driver, assume false, it's here for reference)

   1. Set bit 0x100 in MMIO offset 0x49E

   2. Bitwise OR the GPIO Mask and Set values with 0x180

4. If BoardFlags BFL_PACTRL is set

   1. Bitwise OR both the GPIO Set and Mask values with 0x200

5. If the Core Revision of the current core is >= 2

   1. Bitwise OR the GPIO Mask value with 0x10
6. Now we need to write to the Backplane GPIO Control Register

   1. The (32 bit) GPIO Control Register depends on the chipset. If it has a ChipCommon core, the register at offset 0x6C is the GPIO control register. Otherwise, you can use a PCI core and write to the register at offset 0x6C.

   2. MaskSet the GPIO Control Register with the GPIO Mask and set with GPIO Set

GPIO Disable

After you're done with the chip (e.g. when the kernel module is unloaded), you turn off all GPIO Enable bits.

GPIO Pin Enable Register

The GPIO Pin Enable Register controls whether a certain GPIO pin is enabled and can be switched on and off. Each bit in the register corresponds to a GPIO pin and is enabled by writing a 1 to that address. It is located at MMIO offset 0x49E.

Known GPIO Pins and Functionality

GPIO Pin On/Off Register

The GPIO Pin On/Off Register controls whether a certain GPIO pin is on or off. Each bit in the register corresponds to a GPIO pin. The on or off status of the pin is dependent on the hardware implementation. The register is located at MMIO offset 0x49C.