From the settings provided by the driver, it appears that the chipset uses only spatial diversity techniques for improving reception (which makes sense as a common configuration is two identical antennas). The settings allowed by the driver are:
Antenna Diversity Value |
Setting |
0 |
Force use of antenna 0 |
1 |
Force use of antenna 1 |
2 |
Unknown |
3 |
Automatic antenna diversity selection |
Setting the Antenna Diversity
- If the antenna diversity is unset (0xFFFF), we force the antenna diversity to Automatic antenna diversity selection
Clear the antenna diversity bit in SHM offset 0x005E
- If this is an A PHY or a G PHY
- If we have an A PHY, the offset is 0x0000, if we have a G PHY, the offset is 0x0400, which is added to the offsets below
MaskSet PHYRegister at the offset + 1 with mask 0x7E7F and set with the Antenna Diversity Value << 7, but if the Antenna Diversity Value is 2, set with Automatic antenna diversity selection instead.
If the antenna diversity is >= 2, MaskSet PHYRegister offset + 2B with mask 0xFEFF and set with one of the following:
If the antenna diversity is 2, set with the antenna diversity << 7
- If this is a G PHY
If the antenna diversity is 2 or greater, set bit 0x2000 in PHYRegister 0x48C, otherwise unset that bit
- If the PHY Revision is 2 or higher
Bitwise OR PHYRegister 0x461 with 0x10
MaskSet PHYRegister 0x4AD with mask 0xFF and set with 0x15
- If the PHY Revision is 2
Write 0x8 to PHYRegister 0x427
- Otherwise
MaskSet PHYRegister 0x427 with mask 0xFF and set with 0x8
- If the PHY Revision is 6 or higher
Write 0xDC to PHYRegister 0x49B
- Otherwise (A PHY)
- If the PHY Revision is less than 3
MaskSet PHYRegister 0x2B with mask 0xFF and set with 0x24
- Otherwise
Bitwise OR PHYRegister 0x61 with 0x10
- If the PHY Version is 3
Write 0x1D to PHYRegister 0x93
Write 0x8 to PHYRegister 0x27
- Otherwise
Write 0x3A to PHYRegister 0x93
MaskSet PHYRegister 0x27 with mask 0xFF and set with 0x8
- If the PHY Revision is less than 3
- Otherwise (B PHY)
MaskSet PHYRegister 0x3E2 with mask 0xFE7F and set with one of the following:
If the core revision the current core is 2, set with Automatic antenna diversity << 7
Otherwise, set with the Antenna Diversity Value << 7
If the antenna diversity value is 2 or greater, set the antenna diversity bit in SHM offset 0x005E, the MicrocodeFlagsBitfield
Getting the Antenna Diversity
Lock the PHY Registers (see PHYRegisterLock)
- If this is a G PHY
Read from PHYRegister 0x401, AND with 0x180 and right shift by 7
- Otherwise
Read from PHYRegister 0x3E2, AND with 0x180 and right shift by 7
Unlock the PHY Registers (see PHYRegisterLock)