This function ensures that the chip is setup correctly and is ready for use.

1. Backup the 32 bit contents of SHM control word 0x0001, offset 0x0000

2. Write 0xAA5555AA to SHM control word 0x0001, offset 0x0000

3. Read the 32 bit contents of SHM control word 0x0001, offset 0x0000 and if it does not match the value we just wrote, return false

4. Write 0x55AAAA55 to SHM control word 0x0001, offset 0x0000

5. Read the 32 bit contents of SHM control word 0x0001, offset 0x0000 and if it does not match the value we just wrote, return false

6. Restore the 32 bit value we backed up from SHM control word 0x0001, offset 0x0000

7. If the SB Core Revision is 3 or greater

   1. Write 0xAAAA to MMIO offset 0x18C (16 bit write)

   2. Write 0xCCCCBBBB to MMIO offset 0x18C (32 bit write)

   3. Read MMIO offset 0x604 (16 bit read)

   4. If the value read is not 0xBBBB, return false

   5. Read MMIO offset 0x606 (16 bit read)

   6. If the value read is not 0xCCCC, return false

   7. Write 0 to MMIO offset 0x18C (32 bit write)

8. If MMIO offset 0x120 ORed with 0x80000000 is not 0x80000400, return false

9. If MMIO offset 0x128 isn't set to 0, return false

10. Chip Access is validated if PHY Type is less than 3, and isn't otherwise.