bcm-specs

[Specification

Receiving the TX status

The transmit status can be received in two different ways:

Interrupt Recieved in the DMA Channel or PIO Queue

The received data is simply handed to the interpretation function.

Interrupt Recieved in the General Status Register

The TX Status is received via MMIO register pair 0x170/0x174 as follows: As long as register 0x170 is not 0, you can get a single transmit status from register 0x174, which builds into a 14 byte array as follows:

Denote by v170 the value of the 32-bit register 0x170 from above, and by v174 the value of the 32-bit register 0x170. Make sure that you only read MMIO offsets 0x170 and 0x174 once in each loop iteration.

Array Offset

Value

0 - 1

Probably Ignored

2 - 3

Probably Ignored

4 - 5

Upper half of v170 in little endian

6 - 7

Lower half of v170 in little endian as modified below

8 - 9

Probably ignored

10 - 11

Little endian value of v174 & 0xFFFF

12 - 13

Little endian value of (v174>>16) & 0xFF

For bits 6-7, use the value of ((var170 & 0xFFF0) | ((var170 & 0xF) >> 1)). If v174 has bit 0x01000000 set, OR 0x8 to the result.

After building the array, it is then handed to the actual interpretation function. For more info on the value of the 0x170 register, also see the internal ID field in the transmit header.

Repeat this process until MMIO offset 0x170 & 1 is 0.

Interpreting the TX Status

TX Status Structure

Array Offset

Interpretation

0 - 1

Unknown (Possibly Ignored)

2 - 3

Unknown (Possibly Ignored)

4 - 5

Internal ID from Sending

6

2 Counters (both 4 bits) Upper four bits is the number of attempts done to send the fragment (i.e. retries + 1). The other is unknown.

7

TX Flags

8 - 9

Unknown (Possibly Ignored)

10 - 11

(Probably) 802.11 sequence number

12 - 13

Unknown

TX Flags

Bit

Usage

0x01

ACK was received for packet

0x02

Unknown

0x04

Unknown

0x08

Unknown

0x10

Unknown, probably something to do with power saving

0x20

Still pending? If this is set, the interpretation function does nothing

0x40

Unknown, probably something to do with power saving

0x80

Afterburner NACK

Performing TX Status Interpretation

  1. If flag 0x20 is set in the TX Flags, we skip interpreting the TX Status packet
  2. Remove the packet from the pending DMA/PIO queue specified by the Internal ID of the TX Status above
  3. For DMA, unlock the DMA workaround semaphore and if it's not 0, return, otherwise, we compute bits 25 and 26 in the PowerSavingControlBits

  4. If we there still isn't a packet in the DMA queue and we're in DMA mode with core revision < 7

    1. Get the next packet from the DMA queue
    2. Block DMA TX
    3. If the queue isn't active
      1. Reset the DMA queue
      2. Init the DMA queue

    /!\ After this, it seems that some stats are updated here, not sure if it's useful yet


Exported/Archived from the wiki to HTML on 2016-10-27