bcm-specs

[Specification] 

2050 Radio Core Calibration is performed when the PHY is initialized.

  1. Accumulator 1 and 2 are both set to 0

  2. Save RadioRegisters 0x43, 0x51, 0x52

  3. Save PHYRegisters 0x15, 0x5A, 0x59, 0x58

  4. If this is a B PHY

    1. Save PHYRegister offset 0x30

    2. Save MMIO offset 0x3EC

    3. Write 0xFF to PHYRegister offset 0x30

    4. Write 0x3F3F to MMIO offset 0x3EC

  5. If this is not a B PHY and PHYConnected is true

    1. Save PHYRegister offset 0x811

    2. Save PHYRegister offset 0x812

    3. Save PHYRegister offset 0x814

    4. Save PHYRegister offset 0x815

    5. Save PHYRegister offset 0x429

    6. Save PHYRegister offset 0x802

    7. MaskSet PHYRegister offset 0x814 with mask of ~0 and set of 3

    8. MaskSet PHYRegister offset 0x815 with mask of 0xFFFC and set of 0

    9. MaskSet PHYRegister offset 0x429 with mask of 0x7FFF and set of 0

    10. MaskSet PHYRegister offset 0x802 with mask of 0xFFFC and set of 0

    11. Write 0x1B3 to PHYRegister 0x811

    12. Write 0xFB2 to PHYRegister 0x812

    13. MaskSet MMIO offset 0x3E2 with mask ~0 and value 0x8000

  6. If this is not a B PHY and PHYConnected is false

    1. MaskSet MMIO offset 0x3E2 with mask ~0 and value 0x8000

  7. Save PHYRegister offset 0x35

  8. MaskSet PHYRegister offset 0x35 with mask of 0xFF7F and set of 0

  9. Save MMIO offset 0x3E6

  10. Save MMIO offset 0x3F4

  11. If the Analog Core Revision is 0

    1. Write 0x122 to MMIO offset 0x3E6

  12. Otherwise

    1. If the Analog Core Revision is 2 or greater

      1. MaskSet PHYRegister 0x3 with mask 0xFFBF and set with 0x40

    2. OR MMIO offset 0x3F4 with 0x2000

  13. Find the Radio Core Calibration value using the RCCTable

  14. If this is a B PHY

    1. Write 0x26 into RadioRegister 0x78

  15. Write 0xBFAF to PHYRegister 0x15

  16. Write 0x1403 to PHYRegister 0x2B

  17. If PHYConnected is true

    1. Write 0xB2 to PHYRegister 0x812

  18. Write 0xBFA0 to PHYRegister 0x15

  19. Set RadioRegister 0x51 with 0x4

  20. Write 0 to RadioRegister 0x52

  21. Write 0x9 to the lower 4 bits of RadioRegister 0x43 (leave the rest as-is!)

  22. Write 0 to PHYRegister 0x58

  23. Loop 16 times from 0 to 15

    1. Write 0x480 to PHYRegister 0x5A

    2. Write 0xC810 to PHYRegister 0x59

    3. Write 0xD to PHYRegister 0x58

    4. If PHYConnected is true

      1. Write 0x30B2 to PHYRegister 0x812

    5. Write 0xAFB0 to PHYRegister 0x15

    6. Delay 10 usec

    7. If PHYConnected is true

      1. Write 0x30B2 to PHYRegister 0x812

    8. Write 0xEFB0 to PHYRegister 0x15

    9. Delay 10 usec

    10. If PHYConnected is true

      1. Write 0x30B2 to PHYRegister 0x812

    11. Write 0xFFF0 to PHYRegister 0x15

    12. Delay 10 usec

    13. Read the value of PHYRegister 0x2D and add it to Accumulator 1

    14. Write 0 to PHYRegister 0x58

    15. If PHYConnected is true

      1. Write 0x30B2 to PHYRegister 0x812

    16. Write 0xAFB0 to PHYRegister 0x15

  24. Increment Accumulator 1 then right shift by 9.
  25. Delay 10 usec

  26. Write 0 to PHYRegister 0x58

  27. Loop 16 times from 0 to 15 (4 bit value!)

    1. Take the bitreversed loop index (4 bit value), left shift by 1 and bitwise OR the result with 0x20. Write this value to RadioRegister 0x78

    2. Save the value of RadioRegister 0x78

    3. Delay 10 usec
    4. Loop 16 times from 0 to 15

      1. Write 0xD80 to PHYRegister 0x5A

      2. Write 0xC810 to PHYRegister 0x59

      3. Write 0xD to PHYRegister 0x58

      4. If PHYConnected is true

        1. Write 0x30B2 to PHYRegister 0x812

      5. Write 0xAFB0 to PHYRegister 0x15

      6. Delay 10 usec

      7. If PHYConnected is true

        1. Write 0x30B2 to PHYRegister 0x812

      8. Write 0xEFB0 to PHYRegister 0x15

      9. Delay 10 usec

      10. If PHYConnected is true

        1. Write 0x30B3 to PHYRegister 0x812

      11. Write 0xFFF0 to PHYRegister 0x15

      12. Delay 10 usec

      13. Read the value of PHYRegister 0x2D and add it to Accumulator 2

      14. Write 0 to PHYRegister 0x58

      15. If PHYConnected is true

        1. Write 0x30B2 to PHYRegister 0x812

      16. Write 0xAFB0 to PHYRegister 0x15

    5. Increment Accumulator 2 then right shift by 8
    6. If Accumulator 1 is less than Accumulator 2, break from the loop

  28. Restore the original value of PHYRegister 0x15

  29. Restore the original values of RadioRegister 0x51, 0x52, 0x43

  30. Restore the original values of PHYRegisters 0x5A, 0x59, 0x58

  31. Restore the original value of MMIO offset 0x3E6

  32. If the Analog Core Revision is not 0

    1. Restore the original value of MMIO offset 0x3F4

  33. Restore the original value of PHYRegister 0x35

  34. perform the synthetic PU workaround (channel selection)
  35. If this is a B PHY

    1. Restore the original value of PHYRegister 0x30

    2. Restore the original value of MMIO offset 0x3EC

  36. If this isn't a B PHY and PHYConnected is true

    1. MaskSet MMIO offset 0x3E2 with mask 0x7FFF and set 0

    2. Restore the original value of PHYRegister 0x811

    3. Restore the original value of PHYRegister 0x812

    4. Restore the original value of PHYRegister 0x814

    5. Restore the original value of PHYRegister 0x815

    6. Restore the original value of PHYRegister 0x429

    7. Restore the original value of PHYRegister 0x802

  37. If this isn't a B PHY and PHYConnected isn't true

    1. MaskSet MMIO offset 0x3E2 with mask 0x7FFF and set 0

  38. If we went through all of the loops in Loop 2

    1. Return the saved value of RadioRegister 0x78

  39. Otherwise, return the value from the RCCTable

Exported/Archived from the wiki to HTML on 2016-10-27